This invention relates to the field of data processing systems. More particularly, this invention relates to mechanisms for handling malfunctions within processing systems.
It is known to provide data processing systems with mechanisms for handling malfunctions in the operation of the data processing system. An example of such systems are those which employ error correction codes (ECC) to identify and correct malfunctions resulting in errors within data values stored within a memory. It is known that as memories become more dense, they become more vulnerable to both soft and hard errors. Soft errors may be the result of particle strikes or other temporary perturbations of the data values stored within the memory. Using error correcting codes, the perturbed data values may be detected as containing an error and then the error correcting codes used to correct that error. In the case of hard errors, these may arise due to the failure, during use or manufacture, of a circuit element producing an error in a data storage value stored within a memory which cannot be corrected using the error correction code, in the sense that the one or more bit values stored within the memory can be identified as being in error and the correct value identified, but the memory itself cannot be made to properly store the corrected data value. In this circumstance, it is known to provide mechanisms which are able to correct for such hard errors by substituting alternative storage hardware for the memory address locations in which the hard error has been detected. The corrected data value may then be stored within the alternative storage location instead of the storage location corresponding to the memory address in which the hard error has arisen.